Bidirectional DONE?
43826: 02/06/04: chipscope 43907: 02/06/06: IOSTANDARD 43971: 02/06/07: Re: IOSTANDARD 43973: 02/06/07: opencore PCI bridge versus LogiCORE 44246: 02/06/14: GCK input routing 44247: 02/06/14: Re: MAP problem with RLOC’ed macros 44274: 02/06/15: Re: Stupid WebPack question 44436: 02/06/20: Re: Power supply caps on PCB 44497: 02/06/21: adding timing constraints 44552: 02/06/23: Re: Bad Virtex2 devices – any similar experiences 44555: 02/06/23: CLK/2 44923: 02/07/05: N-bit, 2-input adder 45363: 02/07/20: Re: Problem with OpenCore PCI IP Core 45581: 02/07/27: Re: 32-bit PCI Target core 45582: 02/07/27: Re: Problem with mapping 45704: 02/08/01: Re: Impedance Measureing 46276: 02/08/23: Alliance VLSI software 46279: 02/08/23: Re: Help for Schematic Components 46294: 02/08/24: Re: Help for Schematic Components 46305: 02/08/25: sensing an oscillator 46315: 02/08/26: Re: sensing an oscillator 50954: 02/12/24: Prom Splitting 54521: 03/04/12: Re: Help installing Altera web tools 54539: 03/04/13: