Can UBI logical eraseblocks be written randomly?
No, the flash chip restrictions have to be taken into account. This is because UBI logical eraseblocks (LEB) are mapped to physical eraseblocks (PEB), and an LEB write operation is essentially a write to the corresponding PEB plus a small offset, because there are erase counter and volume ID headers at the beginning of the PEB (see here for few more details). The important flash restrictions are: • many flashes have minimal input-output unit size larger then 1 byte, so write offsets and lengths have to be aligned to the minimum I/O unit size; for example, in case of a NAND flash with 2KiB NAND page it is possible to write only 2, 4, 8, etc KiB chunks and only to 0, 2, 4, 8, etc KiB offsets; • it is prohibited to write more then once to the same PEB offset; • many NAND flashes (specifically, MLC NAND flashes) require NAND pages to be written sequentially from the beginning of the physical eraseblock, to the end of the physical eraseblock; for example, it is prohibited to write first to
