Does the Intel 430HX PCIset support read-modify-write transactions from PCI to DRAM?
If a PCI master locks DRAM, the PCI arbiter considers the arbitration “frozen” on the PCI master. In this state, AHOLD will remain asserted on the CPU bus so the CPU will not be allowed to start any cycles. However, it will be allowed to snoop write-backs. Therefore, read-modify-write transactions from PCI to DRAM are supported by the Intel 430HX PCIset.
