How are we going to design a 400 Million transistor chip?
Sometime in the next few years IC technology will provide the capability to pattern and yield 100M transistors/cm2 resulting in silicon systems of 400+ million transistors. The current buzz in the industry is that reuse and SoC’s will solve the implementation problem, but in reality there will always be a need to create ever more complex designs. Given the current productivity metrics it is painfully obvious that a breakthrough in design productivity will be needed to implement these silicon systems. Is it possible or is there a train wreck up ahead? Biography: Mark McDermott graduated from the University of New Mexico in 1977 with a BSEE. He joined Motorola on the Engineering Rotational Program, with assignments in process engineering, product engineering, systems engineering and IC design engineering. From 1978 to 1981 he worked as an IC Designer in the CMOS Design Group working on microprocessor and speech synthesizers. From 1981 to 1984 he worked at TEGAS Systems, Inc., on a specia