How have Cyclone III FPGAs been optimized for power?
The Cyclone III family takes advantage of several techniques such as the use of TSMC’s 65-nm low-power process technology and the unique power management features in the Quartus II development software to deliver up to a 50 percent power reduction from the 90-nm Cyclone II device family and up to a 75 percent power advantage over competing FPGAs. TSMC’s 65-nm LP process has been fine tuned to provide the lowest static and dynamic power consumption for applications in the portable and consumer markets such as DVRs, handsets, and portable media players. The PowerPlay power analysis and optimization technology in Quartus II development software automatically analyzes and optimizes designs for power consumption while still achieving timing and performance requirements. Low-power benefits include: operations in thermally challenging environments, elimination or reduction in cooling system costs, and extended battery life for portable applications.
