The manual mentions that dummy transmission data should be written to the SODR1 register even if data is only received in the CLK synchronous mode. Why?
• Answer :In CLK synchronous mode, Writing dummy data to the SODR1 register makes it possible to receive 8-bit data. In this case, both internal clocks and external clocks require that dummy data be written. To receive data continuously, dummy data should be written each time 8-bit data is received.
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