What are the software implications of PCI and CompactPCI?
The PCI architecture, developed by Intel, has been carefully planned to simplify the software integration of a peripheral device. For example, all PCI or CompactPCI device have a set of 256 registers which contain information on the device identity, as well as a great deal of software programmable parameters such as address maps, or interrupt types and levels. As a result, the system CPU can automatically detect and identify a device on the bus and configure it without the need for jumpers on the peripheral. PCI is a key element of the “Plug and Play” concept. CompactPCI is truly a “systems level” bus, with configuration (plug and play) and hardware abstraction layers. This permits a high level of software portability, common in the desktop PC world but much rarer in embedded systems.
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