Why do the multiple resets happen when power supply drops down?
The reason for multiple reset is that the POR bits in the VLT_CR register are reset by PPOR. When boot.asm runs (e.g. Vdd = 5, CPU = 24MHz) the POR will be set to 4.75V.If Vdd drops below 4.75, then the POR occurs and the VLT_CR register is cleared, setting POR to 2.4V. Now the part is no longer reset and it starts running boot.asm until it reaches the code that sets POR = 4.75V, where it resets again. It will run this loop repeatedly (on power up and power down) as long as Vdd is between 4.75V and 2.4V. There are several workarounds: • Set any pins that are causing problems to HiZ and set them to the final drive mode in main.c. The loop of reseting happens before the program gets to main.c. • Code could be added in boot.asm to set the LVD to the final voltage range and then poll the status of the LVD in the VLT_CMP register. Then wait in a loop until Vdd is high enough and then continue on. • The set of code listed could be moved to be before the LoadConfig calls. Then the POR loop wo
