Why does each register of my Scatter-Gather DMA Controller Core slave interface take 256bytes?
Solution You will see a larger than expected memory space being taken up by the SGDMA slave interface because eight address bits are used for the slave port. As a result each 32 bit register is spaced 16 bytes apart. The registers are located at the following addresses: Status –> byte address 0, 32 bit word address 0 Control –> byte address 16, 32 bit word address 4 Next Descriptor Pointer –> byte address 32, 32 bit word address 8 If you access the SGDMA registers directly, it is very important that you use the macros defined in “altera_avalon_sgmda_regs.h” so that you do will not need to modify your code if the SGDMA address range is changed.
- Ive already taken some of the required courses. Can I still receive the Capstone discount if I register for all remaining core and elective classes?
- How do you create a RAID array using IDE/Ultra DMA disk drives and why does an IDE/Ultra DMA RAID controller use a SCSI interface?
- Why would IP providers use the Xilinx CORE Generator systems IP Remote Interface feature to point to a set of fixed netlists?