Why is waveform symmetry important?
Communications circuits use leading and trailing edges of their waveforms to trigger subsequent logic events. Such triggering processes require system-wide synchronism between all the triggering functions. Otherwise, the triggering edge of one waveform will not coincide with the window awaiting its triggering stimulus. Ideal logic waveforms have 50%/50% symmetry. That is, both waveform half cycles have the same duration. Actual waveforms, of course, depart from this ideal. As discussed earlier, the midpoint of each data waveform provides an interrogating window. Clock signals (see Fig. 5a), aligned with window centers, initiate the one or zero data-reading process. (a) Figure 5b illustrates the effect of clock waveform asymmetry. The mark-space ratio is no longer 50%/50%. Lack of waveform symmetry offsets the clock’s rising edge from the center of the data window. Data reading then becomes susceptible to jitter and other distortions. (b)Fig. 5. The lack of waveform symmetry offsets the
