How can the IP Remote Interface feature be used to modify synthesizable HDL code?
An IP provider can create a GUI that collects the input variables, which are then used to modify generic variables in VHDL or Verilog source code. This source code can be synthesizable behavioral or structural code. This source code is modified and then deposited in to the customer’s project directory by the Xilinx CORE Generator system. The customer would instantiate this core just like any other hierarchical modules they may have.
