How do I optimize a C design to improve performance and utilization?
By using appropriate C coding styles and through an understanding of the compiler tools it is possible to optimize for both performance and for utilization. (Note that this is true when programming for traditional microprocessors and DSPs as well as for FPGAs.) The first priority of the CoDeveloper compiler is for performance, as measured in required clock cycles to complete a given task. A related, secondary priority is to reduce gate delays, which directly impact maximum clock rates. Because optimizing for speed can result in very large amounts of logic being generated, Impulse C allows certain optimizations (such as loop unrolling and pipelining) to be controlled via language-level pragmas. In a typical usage, Impulse C users are first concerned with getting a working prototype, which may operate at reduced rates but is sufficient to verify correct functionality (in simulation and in hardware) and to analyze dataflow at a system level. Later optimizations may include using modified
