How many timeslots can be terminated onto User Cards?
The answer is not a simple one, as not all User Cards are created alike nor are all CPUs. The following explanation will help you to configure solutions that follow the rules. There are four user card buses, the A, B, C & D buses. Each bus carries 32 64K timeslots of traffic to and from User Cards. Two timeslots on the A bus are used for intra-unit signaling and are not available for User Card traffic. The 8800 Bus Connect CPU (non-redundant) can access only the A & B User buses. Therefore, the maximum bandwidth available to User Cards when using the 8800 CPU is: (2 * 32) – 2 timeslots = 62 timeslots The 8804 Bus Connect CPU/Redundant Capable can access all four buses, but there are limitations on which user buses can be connected to which WAN cards. In Bus Connect (8800 or 8804 CPU) systems, the WAN card in slot W1 is “connected” to user buses A & B. In Bus Connect Systems using the 8804 and having a second active WAN card, the WAN card in slot W3 is “connected” to user buses C & D. N
