Is Virtual Memory possible under RISC OS?
The short answer is that full VM is not possible under the current versions of RISC OS. The problem is that most of RISC OS works in SVC mode, if a DataFetch abort occurs then R14_svc is corrupted. This makes returning from the SWI somewhat problematic. This is a hardware limitation with the ARM2 and ARM3 cell chips. Hardware using ARM6 or better processor cells have special memory abort modes that alleviate this problem so future machines and incarnations of RISC OS may well have VM available. Indeed the new RiscPC machines make prime candidates for having virtual memory, however there are still re-entrancy issues that make this problematic for RISC OS. (Consider loading data from a file into paged out virtual memory…) However limited solutions are available now. !Virtual is one such solution allowing VM for a user process using a limited subset of SWI’s that are carefully ‘protected’ against R14_svc being corrupted. Such solutions suffer from the restricted set of SWI’s they suppor
