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When the SPI function in the HT46RB70 is setup in the Master Mode, how is CSn controlled?

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When the SPI function in the HT46RB70 is setup in the Master Mode, how is CSn controlled?

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Answer When the SPI is setup in the Master mode, if the SIO CDEN configuration option is enabled, then when CSEN (bit 2 of the SBCR register) is setup as a 1, CSn is automatically controlled by the MCU. Here, if SBEN, which is bit 4 of the SBCR register is 1, CSn will output a LOW. When SBEN is 0, CSn will output a HIGH. When CSEN is setup to 0, or if SIO CSEN configuration option is disabled, then CSn is controlled manually.

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